1. Field of the Invention
This invention relates to a method of fabrication of diode-type control matrices for a flat display screen, especially for a liquid-crystal display screen, and also to a flat screen fabricated in accordance with said method.
The present invention finds an application in the general field of large-area thin-film electronics and is more specifically applicable to integrated control of each elementary point of a liquid-crystal screen.
2. Description of the Prior Art
It is already known that liquid-crystal display screens usually have a large number of image points or elements of square or rectangular shape. These image elements can be addressed individually. The definition of the screen is a function of the number of points which are capable of receiving an item of information. Control of each point is performed by application of an electric field. For the purpose of visualizing video information, it has been proposed to provide matrix-type displays in which each image element is defined by the intersection of two orthogonal arrays of leads designated as rows and columns.
Addressing of an image element by means of control voltages applied to the row and to the column which relate to said element does not need to be maintained in the event of adoption of a time-multiplexing technique which permits refreshment of the state of the screen by recurrence. This technique is based on a persistence effect which may be either physiological or available within the screen element. In the case of liquid-crystal display devices, an image element can be assimilated with a capacitor in which the time constant is sufficient to maintain the charge between two successive transient addressing operations.
The performances of a matrix screen can be improved by mounting in series with the image element a non-linear resistor which is practically insulating at values below a threshold voltage but becomes increasingly conductive above said threshold voltage.
A non-linear element of this type can be of varistor material as described in French patent Application No. 81 16217 filed on Aug. 25th 1981 in the name of the present Applicant and published under No. 2,512,240 on Mar. 4th, 1983.
In the field of display screens, current technical requirements are primarily centered on the achievement of higher image definition. In the case of screens of the matrix display type, it is accordingly found necessary to design devices comprising a large number of addressing rows or columns which can amount to as many as 512 or even 1024. This entails a corresponding increase in the number of switching elements and therefore of varistors in the cited patent Application. For the purposes of large-scale production, it is necessary in particular to obtain good reproducibility and high stability of these components. Moreover, the electrical capacitance of the component must be matched with that of the associated cell, also with good reproducibility. In point of fact, however, these requirements cannot be fully satisfied by the materials commonly employed, such as agglomerates of zinc oxide powder containing particles of bismuth oxide and manganese oxide or similar material. The reproducibility and stability of varistors depend among other things on the grain size and on the techniques of passivation of the grain boundaries employed at the time of fabrication. The stray capacitance of the varistor which is also related to the grain boundaries cannot readily be controlled.
Other switching elements can be employed. Nevertheless, liquid-crystal display screens usually exhibit defective uniformity of contrast according to the image elements considered. Such defects are due to dispersion of the characteristics of the switching elements, which may be substantial and is difficult to eliminate on large areas. Although to a lesser extent, such defects may also arise from the thickness of the liquid crystal layer and from its bonding layer.
In order to overcome these disadvantages, devices are known in which the non-linear elements are thin-film transistors which mainly have a base of amorphous silicon or polycrystalline silicon. However, a certain number of difficulties are encountered in this type of technology and therefore have to be overcome if high-quality addressing is to be achieved. The solutions to be found must accordingly take into account the following considerations :
(1) better control of characteristics which depend on the properties of two layers (silicon and insulator) and of their interface ;
(2) a self-alignment technology is necessary in order to achieve better reproducibility over a large area.
Other solutions contemplate the use of known non-linear dipole elements such as the structure having a base of two Schottky diodes mounted in series and in opposition. These diodes are semiconductor diodes which all have the same operating point in the current-voltage characteristic. Devices of this type are described in French patent Application No. 83 14542 filed by the present Applicant on Sept. 13th 1983 and are designed in particular in the form of Schottky diodes.
However, the practical application of this solution is subject to a few restrictive conditions :
the fabrication process involves four masking levels ;
insulation of the flanks of the a-Si mesa is necessary, thus entailing the need for low-temperature deposition of insulating material (dielectric, polyimide) which must not only be of good quality but must also completely cover the flank ;
the metallic contact connections of indium-tin oxide (ITO) on the Schottky gate metals are necessary for connection between said gates, the columns and the point electrodes ;
although of low height, multilevels exist (height of mesa in particular) and there is a potential danger of failure of columns and of connections to the electrodes ;
electrodes of indium-tin oxide (ITO) which are formed in the final step of the process can be annealed (in order to be made conductive) only at temperatures which are compatible with non-exodiffusion of the hydrogen contained in the amorphous silicon. The limit of 250.degree.-280.degree. C. is not usually sufficient for good annealing of ITO.
The present invention removes these different constraints and in fact offers the following advantages :
the method of fabrication in accordance with the invention requires only two masking levels and positioning of the masks does not entail any need for a high degree of accuracy ;
the connections do not call for insulation of the mesa flanks by a dielectric ;
it is not necessary to make contact connections by reservation ;
the conductive columns and electrodes are perfectly coplanar ;
there is no limit for annealing of ITO (or other semitransparent compounds such as In.sub.2 O.sub.3) apart from compatibility with the substrate employed.
The method applies to non-linear elements of the type consisting of Schottky diodes or top-to-tail pin-diodes fabricated on amorphous silicon.